Freescale Semiconductor /MK21D5WS /SPI0 /MCR

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Interpret as MCR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)HALT 0 (RESERVED)RESERVED 0 (RESERVED)RESERVED 0 (RESERVED)RESERVED0 (00)SMPL_PT 0 (0)CLR_RXF 0 (0)CLR_TXF 0 (0)DIS_RXF 0 (0)DIS_TXF 0 (0)MDIS 0 (0)DOZE 0 (0)PCSIS0 (RESERVED)RESERVED 0 (0)ROOE 0 (RESERVED)RESERVED 0 (0)MTFE 0 (0)FRZ 0 (00)DCONF 0 (0)CONT_SCKE 0 (0)MSTR

MSTR=0, DIS_RXF=0, DOZE=0, MTFE=0, FRZ=0, CLR_TXF=0, DCONF=00, PCSIS=0, ROOE=0, HALT=0, MDIS=0, CLR_RXF=0, SMPL_PT=00, CONT_SCKE=0, DIS_TXF=0

Description

Module Configuration Register

Fields

HALT

Halt

0 (0): Start transfers.

1 (1): Stop transfers.

RESERVED

no description available

RESERVED

no description available

RESERVED

no description available

SMPL_PT

Sample Point

0 (00): 0 system clocks between SCK edge and SIN sample

1 (01): 1 system clock between SCK edge and SIN sample

2 (10): 2 system clocks between SCK edge and SIN sample

3 (11): Reserved

CLR_RXF

no description available

0 (0): Do not clear the RX FIFO counter.

1 (1): Clear the RX FIFO counter.

CLR_TXF

Clear TX FIFO

0 (0): Do not clear the TX FIFO counter.

1 (1): Clear the TX FIFO counter.

DIS_RXF

Disable Receive FIFO

0 (0): RX FIFO is enabled.

1 (1): RX FIFO is disabled.

DIS_TXF

Disable Transmit FIFO

0 (0): TX FIFO is enabled.

1 (1): TX FIFO is disabled.

MDIS

Module Disable

0 (0): Enables the module clocks.

1 (1): Allows external logic to disable the module clocks.

DOZE

Doze Enable

0 (0): Doze mode has no effect on the module.

1 (1): Doze mode disables the module.

PCSIS

Peripheral Chip Select x Inactive State

0 (0): The inactive state of PCSx is low.

1 (1): The inactive state of PCSx is high.

RESERVED

no description available

ROOE

Receive FIFO Overflow Overwrite Enable

0 (0): Incoming data is ignored.

1 (1): Incoming data is shifted into the shift register.

RESERVED

no description available

MTFE

Modified Timing Format Enable

0 (0): Modified SPI transfer format disabled.

1 (1): Modified SPI transfer format enabled.

FRZ

Freeze

0 (0): Do not halt serial transfers in Debug mode.

1 (1): Halt serial transfers in Debug mode.

DCONF

DSPI Configuration.

0 (00): SPI

1 (01): Reserved

2 (10): Reserved

3 (11): Reserved

CONT_SCKE

Continuous SCK Enable

0 (0): Continuous SCK disabled.

1 (1): Continuous SCK enabled.

MSTR

Master/Slave Mode Select

0 (0): The module is in Slave mode.

1 (1): The module is in Master mode.

Links

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